Altera PCI Compiler - Manual (Page 209)

Altera Corporation User Guide Version 11.1 3–135
October 2011
Functional Description
Figure 3–49. 64-Bit Address, 64-Bit Data Master Burst Memory Read Transaction
2 3 4 5 6 7 9 10 12
clk
reqn
8 11 1
gntn
ad[31..0]
ad[63..32]
cben[3..0]
cben[7..4]
par
par64
framen
req64n
irdyn
devseln
ack64n
trdyn
stopn
Adr_L
BE_L
Z
D0_L
D0_H
D0-H-PAR
Z 0
0
0
0
Z
Z
BE_H
Z
D1_L D2_L
D1_H D2_H
13 14
Z
Z
Z
D1-H-PAR D2-H-PAR
D0-H-PAR D2-H-PAR D1-H-PAR
l_adi[31..0] Adr_L
l_dato[31..0] D0_L D1_L D2_L
l_dato[63..32] D0_H D1_H D2_H
l_cbeni[3..0] BE_L
l_cbeni[7..4] BE_H
lm_req64n
lm_lastn
lm_rdyn
lm_tsr[9..0] 000 001 004 002 200 008 208 000
l_ldat_ackn
l_hdat_ackn
lm_ackn
lm_dxfrn
lm_adr_ackn
D
Adr_H
Adr_H
D
6
6
Adr-PAR_L
Adr-PAR_H
Adr-PAR_H
l_adi[63..32] Adr_H
6
308