Altera PCI Compiler - Manual (Page 306)

7–38 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI Master Operation
The Avalon-to-PCI address translation table has two configurations (refer
to
“Avalon Configuration” on page 6–16 ):
■ Dynamic
■ Fixed
If Dynamic Translation Table is specified, translation table entries can be
modified, as needed, by the software at run time. If Fixed Translation
Table is specified, the translation table entries are fixed at compile time.
The dynamic Avalon-to-PCI address translation table has the following
properties:
■ The table can be written to via the control register access port
■ Entries must be set up before read or write requests are issued to the
corresponding Avalon-MM addresses
■ The table cannot be preinitialized upon reset
Some applications can use a fixed Avalon-to-PCI address map. Because
Host Bridge applications program the BAR registers on the attached PCI
devices, they can control which PCI address ranges are used. If a large
enough range of the Avalon-MM address space can be set aside to map
all of the BARs in a system, then a single fixed Avalon-to-PCI map can be
used. Even in PCI Target-Only Peripheral mode or PCI Master/Target
Peripheral mode, many embedded applications will know enough about
the required PCI addressing to get by with a small number of fixed
Avalon-to-PCI translations.
Fixed address translations operate identically to the modifiable scheme
described above, except that the translation table effectively becomes a
read only memory (ROM). The same parameters control the size of the
now fixed translation table.
Ordering of Requests
The PCI-Avalon bridge handles the following types of requests:
■ PMW—Posted memory write
■ DRR—Delayed read request
■ DWR—Delayed write request. DWRs are I/O or configuration write
operation requests. The PCI-Avalon bridge does not handle DWRs
as delayed writes. As a:
● PCI master, I/O or configuration writes are generated from
posted Avalon-MM writes. If required to verify completion, you
must issue a subsequent read request to the same target.