Pci host-bridge device mode operation, Figure 7–5 – Altera PCI Compiler User Manual
Page 278
7–10
User Guide Version 11.1
Altera Corporation
PCI Compiler
October 2011
Functional Overview
Figure 7–5. PCI-Avalon Bridge Managing the PCI Master/Target Mode with Control Register Access Option
Enabled
PCI Host-Bridge Device Mode Operation
shows the block diagram of the PCI-Avalon bridge managing
the connectivity of the PCI Host-Bridge Device mode.
PCI-Avalon Bridge
Master/Target Peripheral Mode with Control Register Access Option Enabled
PCI
MegaCore
Function
PCI
Target
Controller
Non-
Prefetchable
Avalon
Master
Host
Processor
PCI
Master/
Target
Device
Bus
Arbiter
Prefetchable
Avalon
Master
Control
Register Access
Avalon Slave
Control
Status
Registers
PCI
Prefetchable
Bridge
Logic
PCI
Non-
Prefetchable
Bridge Logic
PCI
Bus
PCI
Master
Controller
Master
Bridge
Logic
PCI Bus
Acess
Avalon Slave
Master
Peripheral
Master
Peripheral
Slave
Peripheral
Slave
Peripheral
System
Interconnect
Fabric