Altera PCI Compiler - Manual (Page 157)

Altera Corporation User Guide Version 11.1 3–83
October 2011
Functional Description
Figure 3–27 shows an example of a disconnect during a burst target read
transaction, and it applies to all PCI functions—excluding the 64-bit
extension signals as noted for pci_mt32 and pci_t32. During burst
target read transactions, lt_discn should be asserted with the last data
phase on the local side. The lt_rdyn signal is asserted during clock cycle
5 indicating that valid data will be available on the local side in clock cycle
6. Then, lt_discn is asserted in clock cycle 7 indicating the last data
phase to be completed on the local side.
Figure 3–27. Disconnect in a Burst Read Transaction
Note to Figure 3–27 :
(1) This signal is not applicable to either the pci_mt32 or pci_t32 MegaCore functions.
ad[31..0]
(1) ad[63..32]
cben[3..0]
(1) cben[7..4]
par
(1) par64
framen
(1) req64n
irdyn
devseln
(1) ack64n
trdyn
stopn
l_adro[31..0]
l_cmdo[3..0]
l_adi[31..0]
clk
(1) l_adi[63..32]
Adr
6
Adr-PAR
Z
Z
BE0_L
BE0_H
Z
D0_L
D0_H
D0_L
D0_H
D0-L-PAR
D0-H-PAR
D1_L
D1_H
D1_L
D1_H
D1-L-PAR
D1-H-PAR
13 2 3 4 5 6 7 9 10 12 8 11 1
Adr
6
lt_framen
lt_ackn
lt_dxfrn
lt_rdyn
lt_discn
lt_tsr[11..0] 000 381 000 381 781
BE1_L
BE1_H