Altera Triple Speed Ethernet MegaCore Function - Manual (Page 25)

Figure 2-4: IP Parameter Editors
View IP port
and parameter
details
Apply preset parameters for
specific applications Specify your IP variation name
and target device
Legacy parameter
editors
Design Walkthrough
This walkthrough explains how to create a Triple-Speed Ethernet MegaCore function design using Qsys in
the Quartus II software. After you generate a custom variation of the Triple-Speed Ethernet MegaCore
function, you can incorporate it into your overall project.
This walkthrough includes the following steps:
1. Creating a New Quartus II Project on page 2-6
2. Specifying IP Core Parameters and Options on page 2-7
3. Generating a Design Example or Simulation Model on page 2-7
4. Simulate the System on page 2-8
5. Compiling the Triple-Speed Ethernet MegaCore Function Design on page 2-8
6. Programming an FPGA Device on page 2-8
Creating a New Quartus II Project
You need to create a new Quartus II project with the New Project Wizard, which specifies the working
directory for the project, assigns the project name, and designates the name of the top-level design entity.
To create a new project, follow these steps:
1. From the Windows Start menu, select Programs > Altera > Quartus II <version> to launch the Quartus
II software. Alternatively, you can use the Quartus II Web Edition software.
2. On the File menu, click New Project Wizard.
3. In the New Project Wizard: Directory, Name, Top-Level Entity page, specify the working directory,
project name, and top-level design entity name. Click Next.
Getting Started with Altera IP Cores Altera Corporation
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Design Walkthrough 2-6
2014.06.30