Altera Triple Speed Ethernet MegaCore Function - Manual (Page 83)

• Configures the MAC. In the MAC, sets the transmit primary MAC address to EE-CC-88-CC-AA-EE,
sets the speed to 1000 Mbps, enables TX and RX MAC, enables pad removal at receive, sets IPG to
12, and sets maximum packet size to 1518.
• Configures PCS and SGMII interface to 1000BASE-X.
• Configures Timestamp Unit in the MAC, by setting periods and path delay adjustments of the clocks.
• Configures ToD clock by loading a predefined time value.
• Configures clock mode of Packet Classifier to Ordinary Clock mode.
2. Starts packet transmission with different clock mode. The testbench sends a total of three packets:
• 1-step PTP Sync message over Ethernet
• 1-step PTP Sync message over UDP/IPv4 with VLAN tag
• 2-step PTP Sync message over UDP/IPv6 with stacked VLAN tag
3. Configures clock mode of Packet Classifier to End-to-end Transparent Clock mode.
4. Starts packet transmission. The testbench sends a total of three packets:
• 1-step PTP Sync message over Ethernet
• 1-step PTP Sync message over UDP/IPv4 with VLAN tag
• 2-step PTP Sync message over UDP/IPv6 with stacked VLAN tag
5. Ends transmission.
Simulating Triple-Speed Ethernet with IEEE 1588v2 Testbench with ModelSim Simulator
To use the ModelSim simulator to simulate the testbench design:
1. Copy the respective design example directory to your preferred project directory: tse_ieee1588 from
<ip library>/ethernet/altera_eth_tse_design_example.
2. Launch Qsys from the Tools menu and open the tse_1588.qsys file.
3. On the Generation tab, select either a Verilog HDL or VHDL simulation model.
4. Click Generate to generate the simulation and synthesis files.
5. Run the following command to set up the required libraries, to compile the generated IP Functional
simulation model, and to exercise the simulation model with the provided testbench: do tb_run.tcl
Triple-Speed Ethernet with IEEE 1588v2 Design Example Altera Corporation
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Simulating Triple-Speed Ethernet with IEEE 1588v2 Testbench with ModelSim Simulator 5-6
2014.06.30