Configuration register space -1, Interface signals -1 – Altera Triple Speed Ethernet MegaCore Function User Manual

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Triple-Speed Ethernet with IEEE 1588v2 Design Example................................5-1

Software Requirements...............................................................................................................................5-1

Triple-Speed Ethernet with IEEE 1588v2 Design Example Components...........................................5-2

Base Addresses..................................................................................................................................5-3

Triple-Speed Ethernet MAC with IEEE 1588v2 Design Example Files...............................................5-3

Creating a New Triple-Speed Ethernet MAC with IEEE 1588v2 Design............................................5-4

Triple-Speed Ethernet with IEEE 1588v2 Testbench .............................................................................5-4

Triple-Speed Ethernet with IEEE 1588v2 Testbench Files.........................................................5-5

Triple-Speed Ethernet with IEEE 1588v2 Testbench Simulation Flow....................................5-5

Simulating Triple-Speed Ethernet with IEEE 1588v2 Testbench with ModelSim

Simulator.....................................................................................................................................5-6

Configuration Register Space.............................................................................6-1

MAC Configuration Register Space..........................................................................................................6-1

Base Configuration Registers (Dword Offset 0x00 – 0x17).......................................................6-3
Statistics Counters (Dword Offset 0x18 – 0x38).......................................................................6-11
Transmit and Receive Command Registers (Dword Offset 0x3A – 0x3B)............................6-13
Supplementary Address (Dword Offset 0xC0 – 0xC7)............................................................6-15
IEEE 1588v2 Feature (Dword Offset 0xD0 – 0xD6).................................................................6-16
IEEE 1588v2 Feature PMA Delay................................................................................................6-17

PCS Configuration Register Space..........................................................................................................6-18

Control Register (Word Offset 0x00)..........................................................................................6-20
Status Register (Word Offset 0x01).............................................................................................6-22
Dev_Ability and Partner_Ability Registers (Word Offset 0x04 – 0x05)................................6-23
An_Expansion Register (Word Offset 0x06).............................................................................6-26
If_Mode Register (Word Offset 0x14)........................................................................................6-26

Register Initialization................................................................................................................................6-27

Triple-Speed Ethernet System with MII/GMII or RGMII.......................................................6-28
Triple-Speed Ethernet System with SGMII................................................................................6-30
Triple-Speed Ethernet System with 1000BASE-X Interface....................................................6-31

Interface Signals..................................................................................................7-1

Interface Signals...........................................................................................................................................7-1

10/100/1000 Ethernet MAC Signals..............................................................................................7-2
10/100/1000 Multiport Ethernet MAC Signals..........................................................................7-12

10/100/1000 Ethernet MAC with 1000BASE-X/SGMII PCS Signals.....................................7-16

Altera Corporation

Triple-Speed Ethernet MegaCore Function User Guide

TOC-4

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