Altera Triple Speed Ethernet MegaCore Function - Manual (Page 7)

ToD Clock Device Family Support...........................................................................................................C-1
ToD Clock Performance and Resource Utilization................................................................................C-1
ToD Clock Parameter Setting....................................................................................................................C-2
ToD Clock Interface Signals......................................................................................................................C-3
ToD Clock Avalon-MM Control Interface Signals....................................................................C-3
ToD Clock Avalon-ST Transmit Interface Signals.....................................................................C-4
ToD Clock Configuration Register Space................................................................................................C-5
Adjusting ToD Clock Drift............................................................................................................C-6
ToD Synchronizer..............................................................................................D-1
ToD Synchronizer Block............................................................................................................................D-2
ToD Synchronizer Parameter Settings.....................................................................................................D-3
ToD Synchronizer Signals.........................................................................................................................D-4
ToD Synchronizer Common Clock and Reset Signals..............................................................D-4
ToD Synchronizer Interface Signals.............................................................................................D-4
Packet Classifier..................................................................................................E-1
Packet Classifier Block................................................................................................................................E-1
Packet Classifier Signals..............................................................................................................................E-2
Packet Classifier Common Clock and Reset Signals..................................................................E-2
Packet Classifier Avalon-ST Interface Signals.............................................................................E-2
Packet Classifier Ingress Control Signals.....................................................................................E-3
Packet Classifier Control Insert Signals........................................................................................E-4
Packet Classifier Timestamp Field Location Signals..................................................................E-5
Additional Information......................................................................................F-1
Document Revision History.......................................................................................................................F-2
How to Contact Altera................................................................................................................................F-7
Altera Corporation
TOC-7 Triple-Speed Ethernet MegaCore Function User Guide