Altera Triple Speed Ethernet MegaCore Function - Manual (Page 87)

HW Reset Description R/W Name Dword
Offset
0 • Bits[15:0]—16-bit pause quanta. Use this register to
specify the pause quanta to be sent to remote devices
when the local device is congested. The MegaCore
function sets the pause quanta (P1, P2) field in pause
frames to the value of this register.
10/100 and 1000 Small MAC core variations do not
support flow control.
• Bits[31:16]—unused.
RW
pause_quant
0x06
0 Variable-length section-empty threshold of the receive
FIFO buffer. Use the depth of your FIFO buffer to
determine this threshold. This threshold is typically set
to (FIFO Depth – 16).
Set this threshold to a value that is below the rx_almost_
full threshold and above the rx_section_full or rx_
almost_empty
threshold.
In 10/100 and 1000 Small MAC core variations, this
register is RO and the register is set to a fixed value of
(FIFO Depth – 16).
RW/
RO
rx_section_empty
0x07
0 Variable-length section-full threshold of the receive FIFO
buffer. Use the depth of your FIFO buffer to determine
this threshold.
For cut-through mode, this threshold is typically set to
16. Set this threshold to a value that is above the
rx_
almost_empty
threshold.
For store-and-forward mode, set this threshold to 0.
In 10/100 and 1000 Small MAC core variations, this
register is RO and the register is set to a fixed value of 16.
RW/
RO
rx_section_full 0x08
0 Variable-length section-empty threshold of the transmit
FIFO buffer. Use the depth of your FIFO buffer to
determine this threshold. This threshold is typically set
to (FIFO Depth – 16).
Set this threshold to a value below the rx_almost_full
threshold and above the
rx_section_full
or
rx_
almost_empty
threshold.
In 10/100 and 1000 Small MAC core variations, this
register is RO and the register is set to a fixed value of
(FIFO Depth – 16).
RW/
RO
tx_section_empty 0x09
Configuration Register Space Altera Corporation
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UG-01008
Base Configuration Registers (Dword Offset 0x00 – 0x17) 6-4
2014.06.30