If the, Bits in the, Bit is 1 and the – Altera Triple Speed Ethernet MegaCore Function User Manual

Page 67: Register. if the

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Figure 4-17: SGMII Auto-Negotiation in MAC Mode and PHY Mode

SGMII PCS

(MAC Mode)

SGMII Link

Medium

Twisted

Copper

Pair

Device Ability

Link Partner Ability

Altera Device

Triple Speed Ethernet

MegaCore Function

SGMII PCS with PMA

(PHY Mode)

Device Ability

Link Partner Ability

Altera Device

Triple Speed Ethernet

MegaCore Function

Device Ability

10/100/1000BASE-T PHY

10/100/1000BASE-T PHY

Link Partner

Link Partner Ability

Device Ability

Link Partner Ability

If the

SGMII_ENA

and

USE_SGMII_AN

bits in the

if_mode

register are 1, the PCS function is automatically

configured with the capabilities advertised by the PHY device once the auto-negotiation completes.

If the

SGMII_ENA

bit is 1 and the

USE_SGMII_AN

bit is 0, the PCS function can be configured with the

SGMII_SPEED

and

SGMII_DUPLEX

bits in the

if_mode

register.

If the

SGMII_ENA

bit is 1 and the

SGMII_AN_MODE

bit is 1 (SGMII PHY Mode auto-negotiation is enabled)

the speed and duplex mode resolution will be resolved based on the value that you set in the

dev_ability

register once auto negotiation is done. You should use set to the PHY mode if you want to advertise the link
speed and duplex mode to the link partner.

Altera Corporation

Functional Description

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4-31

SGMII Auto-Negotiation

UG-01008
2014.06.30

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