IDEC MicroSmart User Manual
Page 208
7: B
ASIC
I
NSTRUCTIONS
7-24
« FC4A M
ICRO
S
MART
U
SER
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S
M
ANUAL
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MCS and MCR (Master Control Set and Reset), continued
Multiple Usage of MCS instructions
Counter and Shift Register in Master Control Circuit
Ladder Diagram
I1
I2
I3
I4
I5
I6
MCS
MCR
MCS
MCS
This master control circuit will give priority to I1, I3, and I5, in that order.
When input I1 is off, the first MCS is executed so that subsequent inputs I2 through I6 are forced off.
When input I1 is on, the first MCS is not executed so that the following program is executed according to the actual input
statuses of I2 through I6.
When I1 is on and I3 is off, the second MCS is executed so that subsequent inputs I4 through I6 are forced off.
When both I1 and I3 are on, the first and second MCSs are not executed so that the following program is executed accord-
ing to the actual input statuses of I4 through I6.
Instruction
Data
LOD
MCS
LOD
OUT
LOD
MCS
LOD
OUT
LOD
MCS
LOD
OUT
MCR
I1
I2
Q0
I3
I4
Q1
I5
I6
Q2
Program List
Q2
Q0
Q1
Ladder Diagram
I1
MCS
MCR
Input I1
ON
OFF
Counter Pulse Input
ON
OFF
Shift Register Pulse Input
ON
OFF
Timing Chart
Input I2
ON
OFF
When input I1 is on, the MCS is not executed so that the counter and shift register are exe-
cuted according to actual statuses of subsequent inputs I2 through I4.
When input I1 is off, the MCS is executed so that subsequent inputs I2 through I4 are
forced off.
When input I1 is turned on while input I2 is on, the counter and shift register pulse inputs
are turned on as shown below.
CNT
C2
10
I2
Reset
Pulse
I3
I3
I2
SFR
R0
4
I4
Reset
Pulse
Data