IDEC MicroSmart - Manual (Page 246)

13: S HIFT / R OTATE I NSTRUCTIONS
13-2 « FC4A M ICRO S MART U SER ’ S M ANUAL »
Example: SFTL
M8120
REP
M8120 is the initialize pulse special internal relay.
When the CPU star ts operation, the MOV (move) instruction sets 43690
to data register D10.
Each time input I0 is turned on, 16-bit data of data register D10 is shifted
to the left by 1 bit as designated by operand bits. The last bit status
shifted out is set to a carr y (special internal relay M8003). Zeros are set
to the LSB.
0 Before shift: D10 = 43690 1 1 1 0 0 0 1 0 1 1 1 0 0 0 1 0
CY
M8003
MSB LSB
D10
1 After first shift: D10 = 21844 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 0
CY
M8003
MSB LSB
D10
Bits to shift = 1
SOTU
I0
S1 –
43690
D1 –
D10
S1
D10
bits
1
0
0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 0 0 After second shift: D10 = 43688
CY
M8003
MSB LSB
D10
SFTL(W)
MOV(W)
Shift to the left