Freescale Semiconductor Microcontrollers - Manual (Page 258)

HC08 Full Chip Simulation
Configuration Procedure
258 Microcontrollers Debugger Manual
ADC Module Option
In Full Chip Simulation Mode (FCS), this option lets you simulate all the functionality of
the Analog to Digital Conversion (ADC) module including data input on all ADC
channels, flag polling, interrupt operation as well as the bus and CGMXCLK reference
clock sources. FCS mode uses the buffered input structure to simulate the ADC inputs.
The user can queue up to 256 data values. To queue the ADC Input Data, use the ADDI
command in the command prompt. If the data parameter is given, the value is placed into
the next slot in the input buffer. Otherwise, if no parameter is provided, a window is
displayed with the input buffer values. Input values can be entered while the window is
open. An arrow points to the next value to be as input to the ADC. The conversion takes
place after a proper value is written to the ADC Status and Control register. Once the
conversion occurs, the arrow moves to the next value in the ADC Buffer.
Figure 11.8 ADC IN Buffer Display
At any point, the ADCLR command can be used to flush the input buffer for the ADC
simulation.
After the conversion is complete, the first queued value is passed from the data buffer into
the ADC data register. It can be observed in the memory window by displaying the
memory location corresponding to the ADC data register.
Figure 11.9 Memory Component Window
Conversion completion sets the appropriate flag. If you enable interrupts, the Program
Counter changes flow to the interrupt routine (as defined in the vector space of the MCU).