Freescale Semiconductor Microcontrollers - Manual (Page 306)

HC08 Full Chip Simulation
Configuration Procedure
306 Microcontrollers Debugger Manual
If the Timer module is configured for an Output Compare event, once the event takes
place the same CHxF Flag can be observed via the Memory window. If the timer channel
interrupt is enabled, the FCS jumps to an appropriate subroutine as long as the Timer
channel interrupt vector is properly defined. To observe the Timer Overflow Flag (TOF)
increasing as a result of the corresponding CPU event, situate your Memory window on
the memory location of the Timer Status and Control register.
To observe the Pulse Width Modulation (PWM) operation, properly configure the Timer
to operate in the Modulo up count mode, and choose the toggle-on-overflow or clear/set
output on compare events to create a desired duty cycle wave. Once a PWM event takes
place, pin toggle/clear/set behavior corresponding to the Timer configuration can be
observed in the Memory window displaying the IO port associated with a given timer
channel.
To observe the accuracy of the Timer module operation, the user can observe the number
of CPU cycles that it takes for the event to occur. The cycle counter is only incremented as
the user steps through the code. To determine the exact amount of cycles over which the
event occurs, one can either observe the cycle display in the Register window or use the
built in simulation commands. To display the current number of cycles in the Command
window, use the CYCLES command. To change the number of cycles in the cycle counter,
use CYCLES <n>, where <n> is the new cycle value. If an event has a pre-calculated
number of cycles, use CYCLE 00 to reset the number of cycles and GOTOCYCLE <n> to
run through the code until it arrives at the expected event.
Figure 11.53 Register Window With Cycles Display