Freescale Semiconductor Microcontrollers - Manual (Page 709)

Flash Programming
Hardware Considerations
709 Microcontrollers Debugger Manual
Hardware Considerations
This section consists of hardware-specific information about current .FPP files. New
.FPP
file features are explained in release notes.
NOTE The Flash programming release note, in the toolkit installation documentation,
contains the latest information about .FPP files.
HCS08 CPU devices
Typically, one or two Flash modules are listed: FLASH and SMALL_FLASH.
SMALL_FLASH is usually a small block of Flash located below the “High Page
Registers” range. As this range of FLASH is physically linked to the rest of the FLASH,
erasing this block also affects the Flash module, and vice versa. FLASH is the main block
of FLASH above the “High Page Registers” range.
HCS08 CPU devices with banked/paged
EEPROM
As devices described in previous section, FLASH and SMALL_FLASH might be
available.
EEPROM_P0 and EEPROM_P1 are provided to program directly paged EEPROM
ranges. Note that when programming banked/paged EEPROM ranges, programming
addresses must be considered ‘logical’. Erasing one module also erases the other mode.
The setup of EPGMOD bit of FOPT register is not handled.
TIP When available on-chip, EEPROM type modules are by default not selected for
automatic erasing. Refer to
Advanced Options: Erase Prevention section.
ColdFire CPU devices
WARNING! Programming ColdFire devices via the NVMC dialog requires proper
device initialization. Otherwise the device speed sensing fails and
programming/erasing cannot be performed correctly. Typically,
program the ColdFire Flash with the Load Executable File dialog box.