Freescale Semiconductor Microcontrollers - Manual (Page 261)

HC08 Full Chip Simulation
Configuration Procedure
261 Microcontrollers Debugger Manual
Figure 11.11 Frequency Display
Once the CGM is properly configured, the user can monitor the status of the PLL by
polling the corresponding flag. If PLL interrupt is enabled, FCS jumps to an appropriate
subroutine as long as the interrupt vector is properly defined. To observe the flag going up
as a result of the corresponding CPU event, situate your Memory Window on the memory
location of the CGM Status and Control register.
Figure 11.12 Memory Window
For more information on how to properly configure Clock Generation, refer to the
reference manual corresponding to the microprocessor that you are using.
CGM Commands
The following Clock Generation commands are available on the HC08 processor.
XTAL Command
Use the XTAL command to change the value of the simulated external oscillator. This in
turn affects the input to the PLL/DCO, and therefore the bus frequency. The P&E
simulator is a cycle-based simulator, so changing the XTAL value does not affect the
speed of simulation; it does, however, affect the ratio in which peripherals receive cycles.