Freescale Semiconductor Microcontrollers - Manual (Page 279)

HC08 Full Chip Simulation
Configuration Procedure
279 Microcontrollers Debugger Manual
db $02 ; Message 3 Length
db $55 ; Data Byte 1
db $AA ; Data Byte 2
M3Desc_End:
***************************************************************
* Init_CAN - The CAN is placed into the soft reset state, *
* where the control and timing registers can be *
* set and the identifier and mask registers can be *
* configured. After this, the module is placed in *
* normal mode in order to synchronize with the CAN *
* bus. *
***************************************************************
Init_CAN:
lda #$01
sta CMCR0 ; place MSCAN08 into soft reset state
lda #$01
sta CMCR1 ; CAN clock source = CGMOUT*2
lda #$01
sta CBTR0 ; set SJW=0, baud rate prescalar=div by 2
lda #$27
sta CBTR1 ; set TSEG1=7 (8Tq), TSEG2=2 (3Tq), one
; sample per bit
lda #{(CANAddress>21t) & $FF} ; set identifier acceptance
; register to CAN address
sta CIDAR0
lda #{(CANAddress & $38000)>15t}
ora #{(CANAddress & $1C0000)>13t}
ora #$18
sta CIDAR1
lda #{(CANAddress & $7F80)>7t}
sta CIDAR2
lda #{(CANAddress & $7F)<1t}
sta CIDAR3
lda #$00
sta CIDMR0 ; set identifier mask register to exact match
sta CIDMR1
sta CIDMR2
sta CIDMR3
lda #00
sta CIDAC ; set identifier acceptance for single
; 32-bit filter
ldhx #Msg1_Desc ; set up transmission message 1
lda 0,x ; get message address
lsla
lsla
lsla
sta CT0IDR0