Target mcu security bytes, Status area, Serial port stop bits – Freescale Semiconductor Microcontrollers User Manual

Page 355: Pulse irq on stop, Ignore security failure and enter monitor mode

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ICS MON08 Interface Connection

Connection Procedure

355

Microcontrollers Debugger Manual

Serial Port Stop Bits

Serial Port Stop Bits allow users of Class 1-4 devices that are experiencing unreliable
communication to increase the number of stop bits to 2.

Pulse IRQ on Stop

The IRQ on Stop allows the users to execute a mechanism to stop a running HC08
microprocessor. For more information, refer to the Stop a Running HC908 Target.pdf
application note that is available from P&E Microcomputer Systems website:
www.pemicro.com.

Target MCU Security Bytes

In ICS mode, the user's code is simulated on the PC, and not run from the Non-Volatile
memory of the device. Therefore, there is no need to pass security in this mode of
operation.

IGNORE Security Failure and Enter Monitor
Mode

Use this checkbox to cause the software to ignore a failure to properly pass the M68HC08
security check. If the checkbox is set, the software attempts to establish monitor mode
communications regardless of the security status. As long as the Baud and Port are correct,
and the device has been properly powered, this allows monitor mode entry. By ignoring
the security check failure you may still use monitor mode, but the ROM/Flash is not
accessible.

NOTE

If a connection is not established for any reason other than security failure, the
connection dialog box always appears.

STATUS Area

The status area of the P&E Connections Manager window consists of one status string
following the Status: label, and seven items which list the state of the last attempt to
connect to a target and pass security. The description for these items is as follows:

• 0 – ICS Hardware loopback detected:

Every ICS or board which supports MON08 has a serial loopback in hardware
which, by connecting the transmit and receive lines, automatically echoes characters
from the PC. A valid character transmitted from the PC is echoed once by the
loopback circuitry on the board and once by the monitor of the target processor itself.

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