Freescale Semiconductor Microcontrollers - Manual (Page 285)

HC08 Full Chip Simulation
Configuration Procedure
285 Microcontrollers Debugger Manual
sta CRFLG ; reset receive flag
rti
**************************************************************
* DUMMY_ISR - Dummy Interrupt Service Routine. *
* Just does a return from interrupt. *
**************************************************************
DUMMY_ISR:
rti ; simple return
**************************************************************
* Vectors - Specifying Reset and MSCAN Interrupt Routines *
**************************************************************
org VectorStart
dw dummy_isr ; TIMA Channel 5 Vector
dw dummy_isr ; TIMA Channel 4 Vector
dw dummy_isr ; ADC Vector
dw dummy_isr ; Keyboard Vector
dw dummy_isr ; SCI Transmit Vector
dw dummy_isr ; SCI Receive Vector
dw dummy_isr ; SCI Error Vector
dw dummy_isr ; CAN Transmit Vector
dw CAN_ISR ; CAN Receive Vector
dw dummy_isr ; CAN Error Vector
dw dummy_isr ; CAN Wakeup Vector
dw dummy_isr ; SPI Transmit Vector
dw dummy_isr ; SPI Receive Vector
dw dummy_isr ; TIMB Overflow Vector
dw dummy_isr ; TIMB Channel 1 Vector
dw dummy_isr ; TIMB Channel 0 Vector
dw dummy_isr ; TIMA Overflow Vector
dw dummy_isr ; TIMA Channel 3 Vector
dw dummy_isr ; TIMA Channel 2 Vector
dw dummy_isr ; TIMA Channel 1 Vector
dw dummy_isr ; TIMA Channel 0 Vector
dw dummy_isr ; TIM Vector
dw dummy_isr ; PLL Vector
dw dummy_isr ; ~IRQ1
dw dummy_isr ; SWI Vector
dw main_init ; Reset Vector
;
; You may use this code freely as long as this copyright notice
; and website address is included. Visit us at www.pemicro.com
So how is the code laid out in order to handle this? The beginning of the code shows
symbol defines for addresses within memory for RAM, Flash, and interrupt vectors. The
CAN address is specified here as well. Also included are the register file definitions,