NXP Semiconductors LPC24XX UM10237 - Manual (Page 100)

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User manual Rev. 04 — 26 August 2009 100 of 792
NXP Semiconductors
UM10237
Chapter 5: LPC24XX External Memory Controller (EMC)
11.4 Memory configuration example
Fig 19. Typical memory configuration diagram
nCE
nOE
Q[31:0] A[20:0]
nCE
nOE
IO[15:0] A[15:0]
nWE
nUB
nLB
nCE
nOE
IO[15:0] A[15:0]
nWE
nUB
nLB
nCE
nOE
IO[7:0] A[16:0]
nWE
nCE
nOE
IO[7:0] A[16:0]
nWE
nCE
nOE
IO[7:0] A[16:0]
nWE
nCE
nOE
IO[7:0] A[16:0]
nWE
2Mx32 Burst Mask ROM
64Kx16 SRAM, two off
128Kx8 SRAM, four off
A[20:0]
A[20:0]
D[31:0]
D[31:0]
CS0
OE
CS1
CS2
WE
BLS3
BLS2
BLS1
BLS0
A[16:0]
A[16:0]
A[16:0]
A[16:0]
A[15:0]
A[15:0] D[31:16]
D[15:0]
D[31:24]
D[23:16]
D[15:8]
D[7:0]