NXP Semiconductors LPC24XX UM10237 - Manual (Page 108)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 108 of 792
NXP Semiconductors
UM10237
Chapter 6: LPC24XX Memory Accelerator Module (MAM)
Table 101. Suggestions for MAM timing selection
system clock Number of MAM fetch cycles in MAMTIM
(see
Table 6–100 )
< 20 MHz 1 CCLK
20 MHz to 40 MHz 2 CCLK
40 MHz to 60 MHz 3 CCLK
> 60 MHz 4 CCLK