NXP Semiconductors LPC24XX UM10237 - Manual (Page 742)

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User manual Rev. 04 — 26 August 2009 742 of 792
NXP Semiconductors
UM10237
Chapter 33: LPC24XX EmbeddedICE
5. JTAG function select
Remark: JTAG access to the LPC2400 is only possible if no code read protection is
selected, see
Section 3–5 .
The JTAG port may be used either for debug or for boundary scan. The state of the
DBGEN pin determines which function is available. When DBGEN = 0, the JTAG port may
be used for boundary scan. When DBGEN = 1, the JTAG port may be used for debug.
6. Register description
The EmbeddedICE logic contains 16 registers as shown in Table 33–678 below. The
ARM7TDMI-S debug architecture is described in detail in "ARM7TDMI-S (rev 4) Technical
Reference Manual" (ARM DDI 0234A) published by ARM Limited.
7. Block diagram
The block diagram of the debug environment is shown below in Figure 33–147 .
Table 678. EmbeddedICE logic registers
Name Width Description Address
Debug Control 6 Force debug state, disable interrupts 00000
Debug Status 5 Status of debug 00001
Debug Comms Control Register 32 Debug communication control register 00100
Debug Comms Data Register 32 Debug communication data register 00101
Watchpoint 0 Address Value 32 Holds watchpoint 0 address value 01000
Watchpoint 0 Address Mask 32 Holds watchpoint 0 address mask 01001
Watchpoint 0 Data Value 32 Holds watchpoint 0 data value 01010
Watchpoint 0 Data Mask 32 Holds watchpoint 0 data mask 01011
Watchpoint 0 Control Value 9 Holds watchpoint 0 control value 01100
Watchpoint 0 Control Mask 8 Holds watchpoint 0 control mask 01101
Watchpoint 1 Address Value 32 Holds watchpoint 1 address value 10000
Watchpoint 1 Address Mask 32 Holds watchpoint 1 address mask 10001
Watchpoint 1 Data Value 32 Holds watchpoint 1 data value 10010
Watchpoint 1 Data Mask 32 Holds watchpoint 1 data mask 10011
Watchpoint 1 Control Value 9 Holds watchpoint 1 control value 10100
Watchpoint 1 Control Mask 8 Holds watchpoint 1 control mask 10101