Table 16–386, This enables, Ails see – NXP Semiconductors LPC24XX UM10237 User Manual

Page 432: 0xe007 8014, u3lsr - 0xe007 c014, read only), Nxp semiconductors

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

432 of 792

NXP Semiconductors

UM10237

Chapter 16: LPC24XX UART0/2/3

4.8 UARTn Line Status Register (U0LSR - 0xE000 C014, U2LSR -

0xE007 8014, U3LSR - 0xE007 C014, Read Only)

The UnLSR is a read-only register that provides status information on the UARTn TX and
RX blocks.

Table 386. UARTn Line Control Register (U0LCR - address 0xE000 C00C,

U2LCR - 0xE007 800C, U3LCR - 0xE007 C00C) bit description

Bit

Symbol

Value Description

Reset
Value

1:0

Word Length
Select

00

5 bit character length

0

01

6 bit character length

10

7 bit character length

11

8 bit character length

2

Stop Bit Select

0

1 stop bit.

0

1

2 stop bits (1.5 if UnLCR[1:0]=00).

3

Parity Enable

0

Disable parity generation and checking.

0

1

Enable parity generation and checking.

5:4

Parity Select

00

Odd parity. Number of 1s in the transmitted character and
the attached parity bit will be odd.

0

01

Even Parity. Number of 1s in the transmitted character and
the attached parity bit will be even.

10

Forced "1" stick parity.

11

Forced "0" stick parity.

6

Break Control

0

Disable break transmission.

0

1

Enable break transmission. Output pin UART0 TXD is
forced to logic 0 when UnLCR[6] is active high.

7

Divisor Latch
Access Bit
(DLAB)

0

Disable access to Divisor Latches.

0

1

Enable access to Divisor Latches.

Table 387. UARTn Line Status Register (U0LSR - address 0xE000 C014,

U2LSR - 0xE007 8014, U3LSR - 0xE007 C014, Read Only) bit description

Bit Symbol

Value Description

Reset
Value

0

Receiver
Data Ready
(RDR)

0

UnLSR0 is set when the UnRBR holds an unread character
and is cleared when the UARTn RBR FIFO is empty.

0

UnRBR is empty.

1

UnRBR contains valid data.

1

Overrun Error
(OE)

0

The overrun error condition is set as soon as it occurs. An
UnLSR read clears UnLSR1. UnLSR1 is set when UARTn
RSR has a new character assembled and the UARTn RBR
FIFO is full. In this case, the UARTn RBR FIFO will not be
overwritten and the character in the UARTn RSR will be lost.

0

Overrun error status is inactive.

1

Overrun error status is active.

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