NXP Semiconductors LPC24XX UM10237 - Manual (Page 23)

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User manual Rev. 04 — 26 August 2009 23 of 792
NXP Semiconductors
UM10237
Chapter 2: LPC24XX Memory mapping
[1] See EMCControl register address mirror bit in Table 5–68 for address of external memory bank 0.
[2] Connect external boot memory to chip select 1. During boot from external memory, the address mirror bit is
set and memory bank addresses 0 and 1 are swapped.
5.2 Memory re-mapping
In order to allow for compatibility with future derivatives, the entire Boot ROM is mapped
to the top of the on-chip memory space. In this manner, the use of larger or smaller flash
modules will not require changing the location of the Boot ROM (which would require
changing the Boot Loader code itself) or changing the mapping of the Boot ROM interrupt
vectors. Memory spaces other than the interrupt vectors remain in fixed locations.
Figure 2–9 shows the on-chip memory mapping in the modes defined above.
The portion of memory that is re-mapped to allow interrupt processing in different modes
includes the interrupt vector area (32 bytes) and an additional 32 bytes for a total of
64 bytes, that facilitates branching to interrupt handlers at distant physical addresses. The
remapped code locations overlay addresses 0x0000 0000 through 0x0000 003F. A typical
user program in the flash memory can place the entire FIQ handler at address
0x0000 001C without any need to consider memory boundaries. The vector contained in
the SRAM, external memory, and Boot ROM must contain branches to the actual interrupt
handlers, or to other instructions that accomplish the branch to the interrupt handlers.
There are three reasons this configuration was chosen:
1. To give the FIQ handler in the flash memory the advantage of not having to take a
memory boundary caused by the remapping into account.
2. Minimize the need to for the SRAM and Boot ROM vectors to deal with arbitrary
boundaries in the middle of code space.
3. To provide space to store constants for jumping beyond the range of single word
branch instructions.
Table 19. LPC2400 Memory mapping modes
Mode Activation Usage
Boot
Loader
mode Hardware
activation by
any Reset The Boot Loader always executes after any reset. The Boot ROM
interrupt vectors are mapped to the bottom of memory to allow
handling exceptions and using interrupts during the Boot Loading
process. A sector of the flash memory (the Boot flash) is available to
hold part of the Boot Code.
User
Flash
mode Software
activation by
Boot code For LPC2400 parts with flash only. Activated by the Boot Loader when
a valid User Program Signature is recognized in memory and Boot
Loader operation is not forced. Interrupt vectors are not re-mapped
and are found in the bottom of the flash memory.
User RAM
mode Software
activation by
User program Activated by a User Program as desired. Interrupt vectors are
re-mapped to the bottom of the Static RAM.
User
External
memory
mode Software
activation by
user code For LPC2400 parts with flash. Interrupt vectors are re-mapped to
external memory bank 0.
[1]
Software
activation by
boot code For flashless parts LPC2420/60/70 only. Interrupt vectors are
re-mapped to external memory bank 0.
[2]