Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual

Page 766

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

766 of 792

NXP Semiconductors

UM10237

Chapter 36: LPC24XX Supplementary information

allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .340

Table 299.USB Device Interrupt Status register

(USBDevIntSt - address 0xFFE0 C200) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .340

Table 300.USB Device Interrupt Enable register

(USBDevIntEn - address 0xFFE0 C204) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .341

Table 301.USB Device Interrupt Enable register

(USBDevIntEn - address 0xFFE0 C204) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .341

Table 302.USB Device Interrupt Clear register

(USBDevIntClr - address 0xFFE0 C208) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .342

Table 303.USB Device Interrupt Clear register

(USBDevIntClr - address 0xFFE0 C208) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .342

Table 304.USB Device Interrupt Set register (USBDevIntSet

- address 0xFFE0 C20C) bit allocation . . . . .342

Table 305.USB Device Interrupt Set register (USBDevIntSet

- address 0xFFE0 C20C) bit description . . . .342

Table 306.USB Device Interrupt Priority register

(USBDevIntPri - address 0xFFE0 C22C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .343

Table 307.USB Endpoint Interrupt Status register

(USBEpIntSt - address 0xFFE0 C230) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .343

Table 308.USB Endpoint Interrupt Status register

(USBEpIntSt - address 0xFFE0 C230) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .344

Table 309.USB Endpoint Interrupt Enable register

(USBEpIntEn - address 0xFFE0 C234) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .345

Table 310.USB Endpoint Interrupt Enable register

(USBEpIntEn - address 0xFFE0 C234) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .345

Table 311. USB Endpoint Interrupt Clear register

(USBEpIntClr - address 0xFFE0 C238) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .345

Table 312.USB Endpoint Interrupt Clear register

(USBEpIntClr - address 0xFFE0 C238) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .346

Table 313.USB Endpoint Interrupt Set register (USBEpIntSet

- address 0xFFE0 C23C) bit allocation . . . . .346

Table 314.USB Endpoint Interrupt Set register (USBEpIntSet

- address 0xFFE0 C23C) bit description . . . .346

Table 315.USB Endpoint Interrupt Priority register

(USBEpIntPri - address 0xFFE0 C240) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .347

Table 316.USB Endpoint Interrupt Priority register

(USBEpIntPri - address 0xFFE0 C240) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .347

Table 317.USB Realize Endpoint register (USBReEp -

address 0xFFE0 C244) bit allocation . . . . . .348

Table 318.USB Realize Endpoint register (USBReEp -

address 0xFFE0 C244) bit description . . . . .348

Table 319.USB Endpoint Index register (USBEpIn - address

0xFFE0 C248) bit description . . . . . . . . . . . .349

Table 320.USB MaxPacketSize register (USBMaxPSize -

address 0xFFE0 C24C) bit description . . . . . 349

Table 321.USB Receive Data register (USBRxData -

address 0xFFE0 C218) bit description . . . . . 350

Table 322.USB Receive Packet Length register (USBRxPlen

- address 0xFFE0 C220) bit description . . . . 351

Table 323.USB Transmit Data register (USBTxData -

address 0xFFE0 C21C) bit description . . . . . 351

Table 324.USB Transmit Packet Length register

(USBTxPLen - address 0xFFE0 C224) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 352

Table 325.USB Control register (USBCtrl - address 0xFFE0

C228) bit description . . . . . . . . . . . . . . . . . . . 352

Table 326.USB Command Code register (USBCmdCode -

address 0xFFE0 C210) bit description . . . . . 353

Table 327.USB Command Data register (USBCmdData -

address 0xFFE0 C214) bit description . . . . . 353

Table 328.USB DMA Request Status register (USBDMARSt

- address 0xFFE0 C250) bit allocation . . . . . 353

Table 329.USB DMA Request Status register (USBDMARSt

- address 0xFFE0 C250) bit description . . . . 354

Table 330.USB DMA Request Clear register (USBDMARClr

- address 0xFFE0 C254) bit description . . . . 354

Table 331.USB DMA Request Set register (USBDMARSet -

address 0xFFE0 C258) bit description . . . . . 355

Table 332.USB UDCA Head register (USBUDCAH - address

0xFFE0 C280) bit description . . . . . . . . . . . . 355

Table 333.USB EP DMA Status register (USBEpDMASt -

address 0xFFE0 C284) bit description . . . . . 355

Table 334.USB EP DMA Enable register (USBEpDMAEn -

address 0xFFE0 C288) bit description . . . . . 356

Table 335.USB EP DMA Disable register (USBEpDMADis -

address 0xFFE0 C28C) bit description . . . . . 356

Table 336.USB DMA Interrupt Status register (USBDMAIntSt

- address 0xFFE0 C290) bit description . . . . 357

Table 337.USB DMA Interrupt Enable register

(USBDMAIntEn - address 0xFFE0 C294) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 357

Table 338.USB End of Transfer Interrupt Status register

(USBEoTIntSt - address 0xFFE0 C2A0s) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 358

Table 339.USB End of Transfer Interrupt Clear register

(USBEoTIntClr - address 0xFFE0 C2A4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 358

Table 340.USB End of Transfer Interrupt Set register

(USBEoTIntSet - address 0xFFE0 C2A8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 358

Table 341.USB New DD Request Interrupt Status register

(USBNDDRIntSt - address 0xFFE0 C2AC) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 358

Table 342.USB New DD Request Interrupt Clear register

(USBNDDRIntClr - address 0xFFE0 C2B0) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 359

Table 343.USB New DD Request Interrupt Set register

(USBNDDRIntSet - address 0xFFE0 C2B4) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 359

Table 344.USB System Error Interrupt Status register

(USBSysErrIntSt - address 0xFFE0 C2B8) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 359

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