Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

246 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

Each transmit descriptor takes two word locations (8 bytes) in memory. Likewise each
status field takes one word (4 bytes) in memory. Each transmit descriptor consists of a
pointer to the data buffer containing transmit data (Packet) and a control word (Control).
The Packet field has a zero address offset, whereas the control field has a 4 byte address
offset, see

Table 11–238

.

The data buffer pointer (Packet) is a 32 bit, byte aligned address value containing the
base address of the data buffer. The definition of the control word bits is listed in

Table 11–239

.

Table 11–240

shows the one field transmit status.

The transmit status consists of one word which is the StatusInfo word. It contains flags
returned by the MAC and flags generated by the transmit datapath reflecting the status of
the transmission.

Table 11–241

lists the bit definitions in the StatusInfo word.

Table 238. Transmit descriptor fields

Symbol

Address offset

Bytes

Description

Packet

0x0

4

Base address of the data buffer containing transmit data.

Control

0x4

4

Control information, see

Table 11–239

.

Table 239. Transmit descriptor control word

Bit

Symbol

Description

10:0

Size

Size in bytes of the data buffer. This is the size of the frame or fragment as it
needs to be fetched by the DMA manager. In most cases it will be equal to the
byte size of the data buffer pointed to by the Packet field of the descriptor. Size
is -1 encoded e.g. a buffer of 8 bytes is encoded as the Size value 7.

25:11

-

Unused

26

Override

Per frame override. If true, bits 30:27 will override the defaults from the MAC
internal registers. If false, bits 30:27 will be ignored and the default values
from the MAC will be used.

27

Huge

If true, enables huge frame, allowing unlimited frame sizes. When false,
prevents transmission of more than the maximum frame length (MAXF[15:0]).

28

Pad

If true, pad short frames to 64 bytes.

29

CRC

If true, append a hardware CRC to the frame.

30

Last

If true, indicates that this is the descriptor for the last fragment in the transmit
frame. If false, the fragment from the next descriptor should be appended.

31

Interrupt

If true, a TxDone interrupt will be generated when the data in this frame or
frame fragment has been sent and the associated status information has been
committed to memory.

Table 240. Transmit status fields

Symbol

Address
offset

Bytes

Description

StatusInfo

0x0

4

Transmit status return flags, see

Table 11–241

.

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