NXP Semiconductors LPC24XX UM10237 User Manual

Page 255

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

255 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

IntStatus register is set in the case of a LateCollision, ExcessiveCollision, ExcessiveDefer,
or NoDescriptor error; Underrun errors are reported in the TxUnderrun bit of the IntStatus
register.

Underrun errors can have three causes:

The next fragment in a multi-fragment transmission is not available. This is a nonfatal
error. A NoDescriptor status will be returned on the previous fragment and the TxError
bit in IntStatus will be set.

The transmission fragment data is not available when the Ethernet block has already
started sending the frame. This is a nonfatal error. An Underrun status will be returned
on transfer and the TxError bit in IntStatus will be set.

The flow of transmission statuses stalls and a new status has to be written while a
previous status still waits to be transferred across the memory interface. This is a fatal
error which can only be resolved by a soft reset of the hardware.

The first and second situations are nonfatal and the device driver has to resend the frame
or have upper software layers resend the frame. In the third case the hardware is in an
undefined state and needs to be soft reset by setting the TxReset bit in the Command
register.

After reporting a LateCollision, ExcessiveCollision, ExcessiveDefer or Underrun error, the
transmission of the erroneous frame will be aborted, remaining transmission data and
frame fragments will be discarded and transmission will continue with the next frame in
the descriptor array.

Device drivers should catch the transmission errors and take action.

Transmit triggers interrupts

The transmit datapath can generate four different interrupt types:

If the Interrupt bit in the descriptor Control field is set, the Tx DMA will set the
TxDoneInt bit in the IntStatus register after sending the fragment and committing the
associated transmission status to memory. Even if a descriptor (fragment) is not the
last in a multi-fragment frame the Interrupt bit in the descriptor can be used to
generate an interrupt.

If the descriptor array is empty while the Ethernet hardware is enabled the hardware
will set the TxFinishedInt bit of the IntStatus register.

If the AHB interface does not consume the transmission statuses at a sufficiently high
bandwidth the transmission may underrun in which case the TxUnderrun bit will be set
in the IntStatus register. This is a fatal error which requires a soft reset of the
transmission queue.

In the case of a transmission error (LateCollision, ExcessiveCollision, or
ExcessiveDefer) or a multi-fragment frame where the device driver did provide the
initial fragments but did not provide the rest of the fragments (NoDescriptor) or in the
case of a nonfatal overrun, the hardware will set the TxErrorInt bit of the IntStatus
register.

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