NXP Semiconductors LPC24XX UM10237 - Manual (Page 227)

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User manual Rev. 04 — 26 August 2009 227 of 792
NXP Semiconductors
UM10237
Chapter 11: LPC24XX Ethernet
Here are two examples to access PHY via the MII Management Controller.
For PHY Write if scan is not used:
1. Write 0 to MCMD
2. Write PHY address and register address to MADR
3. Write data to MWTD
4. Wait for busy bit to be cleared in MIND
For PHY Read if scan is not used:
1. Write 1 to MCMD
2. Write PHY address and register address to MADR
3. Wait for busy bit to be cleared in MIND
4. Write 0 to MCMD
5. Read data from MRDD
7.1.15 Station Address 0 Register (SA0 - 0xFFE0 0040)
The Station Address 0 register (SA0) has an address of 0xFFE0 0040. The bit definition of
this register is shown in
Table 11–203 .
The station address is used for perfect address filtering and for sending pause control
frames. For the ordering of the octets in the packet please refer to
Figure 11–27 .
7.1.16 Station Address 1 Register (SA1 - 0xFFE0 0044)
The Station Address 1 register (SA1) has an address of 0xFFE0 0044. The bit definition of
this register is shown in
Table 11–204 .
Table 202. MII Mgmt Indicators register (MIND - address 0xFFE0 0034) bit description
Bit Symbol Function Reset
value
0 BUSY When ’1’ is returned - indicates MII Mgmt is currently performing an
MII Mgmt Read or Write cycle. 0
1 SCANNING When ’1’ is returned - indicates a scan operation (continuous MII
Mgmt Read cycles) is in progress. 0
2 NOT VALID When ’1’ is returned - indicates MII Mgmt Read cycle has not
completed and the Read Data is not yet valid. 0
3 MII Link Fail When ’1’ is returned - indicates that an MII Mgmt link fail has
occurred.
0
31:4 - Unused 0x0
Table 203. Station Address register (SA0 - address 0xFFE0 0040) bit description
Bit Symbol Function Reset
value
7:0 STATION ADDRESS,
2nd octet This field holds the second octet of the station address. 0x0
15:8 STATION ADDRESS,
1st octet This field holds the first octet of the station address. 0x0
31:16 - Unused 0x0