NXP Semiconductors LPC24XX UM10237 - Manual (Page 196)

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User manual Rev. 04 — 26 August 2009 196 of 792
NXP Semiconductors
UM10237
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
5. Pin description
6. Register description
LPC2400 has up to five 32-bit General Purpose I/O ports. PORT0 and PORT1 are
controlled via two groups of registers as shown in
Table 10–158 and Table 10–159 . Apart
from them, LPC2400 can have three additional 32-bit ports, PORT2, PORT3 and PORT4.
Details on a specific GPIO port usage can be found in the chapters "Pin Configuration"
and "Pin Connect Block".
Legacy registers shown in Table 10–158 allow backward compatibility with earlier family
devices, using existing code. The functions and relative timing of older GPIO
implementations is preserved. Only PORT0 and PORT1 can be controlled via the legacy
port registers.
The registers in Table 10–159 represent the enhanced GPIO features available on all of
the LPC2400’s GPIO ports. These registers are located directly on the local bus of the
CPU for the fastest possible read and write timing. They can be accessed as byte or
half-word long data, too. A mask register allows access to a group of bits in a single GPIO
port independently from other bits in the same port.
When PORT0 and PORT1 are used, user must select whether these ports will be
accessed via registers that provide enhanced features or a legacy set of registers (see
Section 3–3.4 “Other system controls and status flags” on page 38 ). While both of a port’s
fast and legacy GPIO registers are controlling the same physical pins, these two port
control branches are mutually exclusive and operate independently. For example,
changing a pin’s output via a fast register will not be observable via the corresponding
legacy register.
The following text will refer to the legacy GPIO as "the slow" GPIO, while GPIO equipped
with the enhanced features will be referred as "the fast" GPIO.
Table 157. GPIO pin description
Pin Name Type Description
P0[31:0]
P1[31:0]
P2[31:0]
P3[31:0]
P4[31:0] Input/
Output General purpose input/output. These are typically shared with other
peripherals functions and will therefore not all be available in an
application. Packaging options may affect the number of GPIOs
available in a particular device.
Some pins may be limited by requirements of the alternate functions of
the pin. For example, the pins containing the I
2 C0 functions are
open-drain for any function selected on that pin. Details may be found
in the LPC2400 pin description in
Section 8–4 .