NXP Semiconductors LPC24XX UM10237 - Manual (Page 205)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 205 of 792
NXP Semiconductors
UM10237
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
6.5 Fast GPIO port Mask register FIOMASK(FIO[0/1/2/3/4]MASK -
0x3FFF C0[1/3/5/7/9]0)
This register is available in the enhanced group of registers only. It is used to select port
pins that will and will not be affected by write accesses to the FIOPIN, FIOSET or FIOCLR
register. Mask register also filters out port’s content when the FIOPIN register is read.
A zero in this register’s bit enables an access to the corresponding physical pin via a read
or write access. If a bit in this register is one, corresponding pin will not be changed with
write access and if read, will not be reflected in the updated FIOPIN register. For software
examples, see
Section 10–7 “GPIO usage notes” on page 209
Table 172. Fast GPIO port Pin value byte and half-word accessible register description
Generic
Register
name Description Register
length (bits)
& access Reset
value PORTn Register
Address & Name
FIOxPIN0 Fast GPIO Port x Pin value
register 0. Bit 0 in FIOxPIN0
register corresponds to pin
Px.0 ... bit 7 to pin Px.7. 8 (byte)
R/W 0x00 FIO0PIN0 - 0x3FFF C014
FIO1PIN0 - 0x3FFF C034
FIO2PIN0 - 0x3FFF C054
FIO3PIN0 - 0x3FFF C074
FIO4PIN0 - 0x3FFF C094
FIOxPIN1 Fast GPIO Port x Pin value
register 1. Bit 0 in FIOxPIN1
register corresponds to pin
Px.8 ... bit 7 to pin Px.15. 8 (byte)
R/W 0x00 FIO0PIN1 - 0x3FFF C015
FIO1PIN1 - 0x3FFF C035
FIO2PIN1 - 0x3FFF C055
FIO3PIN1 - 0x3FFF C075
FIO4PIN1 - 0x3FFF C095
FIOxPIN2 Fast GPIO Port x Pin value
register 2. Bit 0 in FIOxPIN2
register corresponds to pin
Px.16 ... bit 7 to pin Px.23. 8 (byte)
R/W 0x00 FIO0PIN2 - 0x3FFF C016
FIO1PIN2 - 0x3FFF C036
FIO2PIN2 - 0x3FFF C056
FIO3PIN2 - 0x3FFF C076
FIO4PIN2 - 0x3FFF C096
FIOxPIN3 Fast GPIO Port x Pin value
register 3. Bit 0 in FIOxPIN3
register corresponds to pin
Px.24 ... bit 7 to pin Px.31. 8 (byte)
R/W 0x00 FIO0PIN3 - 0x3FFF C017
FIO1PIN3 - 0x3FFF C037
FIO2PIN3 - 0x3FFF C057
FIO3PIN3 - 0x3FFF C077
FIO4PIN3 - 0x3FFF C097
FIOxPINL Fast GPIO Port x Pin value
Lower half-word register. Bit 0
in FIOxPINL register
corresponds to pin Px.0 ... bit
15 to pin Px.15. 16 (half-word)
R/W 0x0000 FIO0PINL - 0x3FFF C014
FIO1PINL - 0x3FFF C034
FIO2PINL - 0x3FFF C054
FIO3PINL - 0x3FFF C074
FIO4PINL - 0x3FFF C094
FIOxPINU Fast GPIO Port x Pin value
Upper half-word register. Bit 0
in FIOxPINU register
corresponds to pin Px.16 ... bit
15 to Px.31. 16 (half-word)
R/W 0x0000 FIO0PINU - 0x3FFF C016
FIO1PINU - 0x3FFF C036
FIO2PINU - 0x3FFF C056
FIO3PINU - 0x3FFF C076
FIO4PINU - 0x3FFF C096