NXP Semiconductors LPC24XX UM10237 - Manual (Page 46)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 46 of 792
NXP Semiconductors
UM10237
Chapter 4: LPC24XX Clocking and power control
[1] Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
3.1 Clock source selection multiplexer
Several clock sources may be chosen to drive the PLL and ultimately the CPU and
on-chip peripheral devices. The clock sources available are the main oscillator, the RTC
oscillator, and the Internal RC (IRC) oscillator.
The clock source selection can only be changed safely when the PLL is not connected.
For a detailed description of how to change the clock source in a system using the PLL
see
Section 4–3.2.14 “PLL setup sequence” .
Note the following restrictions regarding the choice of clock sources:
• The IRC oscillator cannot be used as clock source for the USB block.
• The IRC oscillator cannot be used as clock source for the CAN controllers if the CAN
baud rate is larger than 100 kbit/s.
3.1.1 Clock Source Select register (CLKSRCSEL - 0xE01F C10C)
The PCLKSRCSEL register contains the bits that select the clock source for the PLL.
3.2 PLL (Phase Locked Loop)
The PLL accepts an input clock frequency in the range of 32 kHz to 24 MHz. The input
frequency is multiplied up to a high frequency, then divided down to provide the actual
clock used by the CPU and the USB block.
PCON Power Control Register R/W 0 0xE01F C0C0
INTWAKE Interrupt Wakeup Register R/W 0 0xE01F C144
PCONP Power Control for Peripherals Register R/W 0x03BE 0xE01F C0C4
Table 41. Summary of system control registers
Name Description Access Reset
value
[1]
Address
Table 42. Clock Source Select register (CLKSRCSEL - address 0xE01F C10C) bit
description
Bit Symbol Value Description Reset
value
1:0 CLKSRC Selects the clock source for the PLL as follows: 0
00 Selects the Internal RC oscillator as the PLL clock source
(default).
01 Selects the main oscillator as the PLL clock source.
10 Selects the RTC oscillator as the PLL clock source.
11 Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Warning: Improper setting of this value, or an incorrect sequence of
changing this value may result in incorrect operation of the device.
7:2 - 0 Unused, always 0. 0