NXP Semiconductors LPC24XX UM10237 User Manual

Page 278

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

278 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

The flexibility of the descriptors used in the Ethernet block allows the possibility of defining
memory buffers in a range of sizes. In order to analyze bus bandwidth requirements,
some assumptions must be made about these buffers. The "worst case" is not addressed
since that would involve all descriptors pointing to single byte buffers, with most of the
memory occupied in holding descriptors and very little data. It can easily be shown that
the AHB cannot handle the huge amount of bus traffic that would be caused by such a
degenerate (and illogical) case.

For this analysis, an Ethernet packet is assumed to consist of a 64 byte frame.
Continuous traffic is assumed on both the transmit and receive channels.

This analysis does not reflect the flow of Ethernet traffic over time, which would include
inter-packet gaps in both the transmit and receive channels that reduce the bandwidth
requirements over a larger time frame.

Types of DMA access and their bandwidth requirements

The interface to an external Ethernet PHY is via either MII or RMII. An MII operates at
25 MHz, transferring a byte in 2 clock cycles. An RMII operates at 50 MHz , transferring a
byte in 4 clock cycles. The data transfer rate is the same in both cases: 12.5 Mbps.

The Ethernet block initiates DMA accesses for the following cases:

Tx descriptor read:

Transmit descriptors occupy 2 words (8 bytes) of memory and are read once for

each use of a descriptor.

Two word read happens once every 64 bytes (16 words) of transmitted data.

This gives 1/8th of the data rate, which = 1.5625 Mbps.

Rx descriptor read:

Receive descriptors occupy 2 words (8 bytes) of memory and are read once for

each use of a descriptor.

Two word read happens once every 64 bytes (16 words) of received data.

This gives 1/8th of the data rate, which = 1.5625 Mbps.

Tx status write:

Transmit status occupies 1 word (4 bytes) of memory and is written once for each

use of a descriptor.

One word write happens once every 64 bytes (16 words) of transmitted data.

This gives 1/16th of the data rate, which = 0.7813 Mbps.

Rx status write:

Receive status occupies 2 words (8 bytes) of memory and is written once for each

use of a descriptor.

Two word write happens once every 64 bytes (16 words) of received data.

This gives 1/8 of the data rate, which = 1.5625 Mbps.

Tx data read:

Data transmitted in an Ethernet frame, the size is variable.

Basic Ethernet rate = 12.5 Mbps.

Rx data write:

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