24 crc calculation – NXP Semiconductors LPC24XX UM10237 User Manual

Page 279

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

279 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

Data to be received in an Ethernet frame, the size is variable.

Basic Ethernet rate = 12.5 Mbps.

This gives a total rate of 30.5 Mbps for the traffic generated by the Ethernet DMA function.

9.23.2 Types of CPU access

Accesses that mirror each of the DMA access types:

All or part of status values must be read, and all or part of descriptors need to be

written after each use, transmitted data must be stored in the memory by the CPU,
and eventually received data must be retrieved from the memory by the CPU.

This gives roughly the same or slightly lower rate as the combined DMA functions,

which = 30.5 Mbps.

Access to registers in the Ethernet block:

The CPU must read the RxProduceIndex, TxConsumeIndex, and IntStatus

registers, and both read and write the RxConsumeIndex and TxProduceIndex
registers.

7 word read/writes once every 64 bytes (16 words) of transmitted and received

data.

This gives 7/16 of the data rate, which = 5.4688 Mbps.

This gives a total rate of 36 Mbps for the traffic generated by the Ethernet DMA function.

9.23.3 Overall bandwidth

Overall traffic on the AHB is the sum of DMA access rates and CPU access rates, which
comes to approximately 66.5 MB/s.

The peak bandwidth requirement can be somewhat higher due to the use of small
memory buffers, in order to hold often used addresses (e.g. the station address) for
example. Driver software can determine how to build frames in an efficient manner that
does not overutilize the AHB.

The bandwidth available on the AHB bus depends on the system clock frequency. As an
example, assume that the system clock is set at 60 MHz. All or nearly all of bus accesses
related to the Ethernet will be word transfers. The raw AHB bandwidth can be
approximated as 4 bytes per two system clocks, which equals 2 times the system clock
rate. With a 60 MHz system clock, the bandwidth is 120 MB/s, giving about 55% utilization
for Ethernet traffic during simultaneous transmit and receive operations.

9.24 CRC calculation

The calculation is used for several purposes:

Generation the FCS at the end of the Ethernet frame.

Generation of the hash table index for the hash table filtering.

Generation of the destination and source address hash CRCs.

The C pseudocode function below calculates the CRC on a frame taking the frame
(without FCS) and the number of bytes in the frame as arguments. The function returns
the CRC as a 32 bit integer.

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