Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual
Page 777

UM10237_4
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 04 — 26 August 2009
777 of 792
NXP Semiconductors
UM10237
Chapter 36: LPC24XX Supplementary information
External memory interface . . . . . . . . . . . . . . . 96
32-bit wide memory bank connection . . . . . . 97
16-bit wide memory bank connection . . . . . . 98
8-bit wide memory bank connection . . . . . . . 99
Memory configuration example . . . . . . . . . . 100
Chapter 6: LPC24XX Memory Accelerator Module (MAM)
How to read this chapter . . . . . . . . . . . . . . . . 101
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Memory Acceleration Module blocks. . . . . . 102
Flash memory bank . . . . . . . . . . . . . . . . . . . 102
Instruction latches and data latches . . . . . . . 103
Flash programming Issues . . . . . . . . . . . . . . 103
Memory Accelerator Module operating modes .
103
MAM configuration . . . . . . . . . . . . . . . . . . . . 104
Register description . . . . . . . . . . . . . . . . . . . 105
MAM Control Register (MAMCR -
0xE01F C000) . . . . . . . . . . . . . . . . . . . . . . . 105
MAM Timing Register (MAMTIM -
0xE01F C004) . . . . . . . . . . . . . . . . . . . . . . . 105
MAM usage notes . . . . . . . . . . . . . . . . . . . . . 107
Chapter 7: LPC24XX Vectored Interrupt Controller (VIC)
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Register description . . . . . . . . . . . . . . . . . . . 109
Software Interrupt Clear Register
(VICSoftIntClear - 0xFFFF F01C). . . . . . . . . 112
IRQ Status Register (VICIRQStatus -
0xFFFF F000) . . . . . . . . . . . . . . . . . . . . . . . . 114
FIQ Status Register (VICFIQStatus -
0xFFFF F004) . . . . . . . . . . . . . . . . . . . . . . . . 114
Vector Priority Registers 0-31
(VICVectPriority0-31 - 0xFFFF F200 to 27C). 115
Software Priority Mask Register
(VICSWPriorityMask - 0xFFFF F024) . . . . . . 115
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 116
Chapter 8: LPC24XX Pin configuration
How to read this chapter . . . . . . . . . . . . . . . . 120
LPC2400 pin packages . . . . . . . . . . . . . . . . . 120
LPC2400 180-pin package . . . . . . . . . . . . . . 120
LPC2400 208-pin packages . . . . . . . . . . . . . 121
LPC2458 pinning information . . . . . . . . . . . 121
LPC2460/68 pinning information . . . . . . . . . 137
LPC2470/78 pinning information . . . . . . . . . 155
LPC2420/60/70 boot control . . . . . . . . . . . . . 175
Chapter 9: LPC24XX Pin connect
How to read this chapter . . . . . . . . . . . . . . . . 177
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Pin function select register values. . . . . . . . 178
Pin mode select register values . . . . . . . . . . 178
Register description . . . . . . . . . . . . . . . . . . . 178