NXP Semiconductors LPC24XX UM10237 - Manual (Page 378)

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User manual Rev. 04 — 26 August 2009 378 of 792
NXP Semiconductors
UM10237
Chapter 13: LPC24XX USB device controller
14.4.6 DMA_buffer_length
This indicates the depth of the DMA buffer allocated for transferring the data. The DMA
engine will stop using this descriptor when this limit is reached and will look for the next
descriptor.
In Normal mode operation, software sets this value for both IN and OUT endpoints. In
ATLE mode operation, software sets this value for IN endpoints only. For OUT endpoints,
hardware sets this value using the extracted length of the data stream.
For isochronous endpoints, DMA_buffer_length is specified in number of packets, for
non-isochronous endpoints in bytes.
14.4.7 DMA_buffer_start_addr
The address where the data is read from or written to. This field is updated each time the
DMA engine finishes transferring a packet.
14.4.8 DD_retired
This bit is set by hardware when the DMA engine finishes the current descriptor. This
happens when the end of the buffer is reached, a short packet is transferred
(non-isochronous endpoints), or an error condition is detected.
14.4.9 DD_status
The status of the DMA transfer is encoded in this field. The following codes are defined:
• NotServiced - No packet has been transferred yet.
• BeingServiced - At least one packet is transferred.
• NormalCompletion - The DD is retired because the end of the buffer is reached and
there were no errors. The DD_retired bit is also set.
• DataUnderrun - Before reaching the end of the DMA buffer, the USB transfer is
terminated because a short packet is received. The DD_retired bit is also set.
• DataOverrun - The end of the DMA buffer is reached in the middle of a packet
transfer. This is an error situation. The DD_retired bit is set. The present DMA count
field is equal to the value of DMA_buffer_length. The packet must be re-transmitted
from the endpoint buffer in another DMA transfer. The corresponding
EPxx_DMA_ENABLE bit in USBEpDMASt is cleared.
• SystemError - The DMA transfer being serviced is terminated because of an error on
the AHB bus. The DD_retired bit is not set in this case. The corresponding
EPxx_DMA_ENABLE in USBEpDMASt is cleared. Since a system error can happen
while updating the DD, the DD fields in RAM may be unreliable.
14.4.10 Packet_valid
This bit is used for isochronous endpoints. It indicates whether the last packet transferred
to the memory is received with errors or not. This bit is set if the packet is valid, i.e., it was
received without errors. See
Section 13–14.6 “Isochronous endpoint operation” on page
381 for isochronous endpoint operation.
This bit is unnecessary for non-isochronous endpoints because a DMA request is
generated only for packets without errors, and thus Packet_valid will always be set when
the request is generated.