Texas Instruments MSP430x1xx - Manual (Page 125)

Ports P1, P2
8-5
Digital I/O Configuration
8.2.1.2 Output Registers P1OUT, P2OUT
Each output register shows the information of the output buffer. The output
buffer can be modified by all instructions that write to a destination. If read, the
contents of the output buffer are independent of pin direction. A direction
change does not modify the output buffer contents.
8.2.1.3 Direction Registers P1DIR, P2DIR
The direction registers contain eight independent bits that define the direction
of the I/O pin. All bits are reset by the PUC signal.
When:
Bit = 0: The port pin is switched to input direction (3-state)
Bit = 1: The port pin is switched to output direction
8.2.1.4 Interrupt Flags P1IFG, P2IFG
Each interrupt flag register contains eight flags that reflect whether or not an
interrupt is pending for the corresponding I/O pin, if the I/O is interrupt-enabled.
When:
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending due to a transition at the I/O pin or from
software setting the bit.
Note:
Manipulating P1OUT and P1DIR, as well as P2OUT and P2DIR, can result
in setting the P1IFG or P2IFG bits.
Writing a zero to an interrupt flag resets it; writing a one to an interrupt flag sets
it and generates an interrupt.
Each group of interrupt flags P1FLG.0 to P1FLG.7 and P2FLG.0 to P2FLG.7
sources its own interrupt vector. Interrupt flags P1IFG.0 to P1IFG.7 and
P2IFG.0 to P2IFG.7 are not reset automatically when an interrupt from these
events is serviced. The software should determine the origin of the interrupt
and reset the appropriate flag(s).
Note:
Any external interrupt event should be at least 1.5 times MCLK or longer, to
ensure that it is accepted and the corresponding interrupt flag is set.