Texas Instruments MSP430x1xx - Manual (Page 239)

Utilizing Features of Low-Power Modes
12-23
USART Peripheral Interface, UART Mode
12.6.1.1 Start Conditions
The URXD signal feeds into the USART module by first going into a deglitch
circuit. Glitches cannot trigger the receive-start condition flag URXS, which
prevents the module from being started from small glitches on the URXD line.
Because glitches do not start the system or the USART module, current
consumption is reduced in noisy environments. Figure 12–24 shows the
accepted receive-start timing condition.
Figure 12–24. Receive - Start Timing Using URXS Flag, Start Bit Accepted
URXS Is Reset in the Interrupt
Handler Using Control Bit URXSE
Majority Vote
URXD
URXS
t τ
The UART stops receiving a character when the URXD signal exceeds the
deglitch time t
τ but the majority vote on the signal fails to detect a start bit, as
shown in Figure 12–25. The software should handle this condition and return
the system to the appropriate low-power mode. The interrupt flag URXIFG is
not set.
Figure 12–25. Receive-Start Timing Using URXS Flag, Start Bit Not Accepted
URXS Is Reset in the Interrupt
Handler Using Control Bit URXSE
URXD
URXS
t τ
Majority Vote
Glitches at the URXD line are suppressed automatically and no further activity
occurs in the MSP430 as shown in Figure 12–26. The data for the deglitch time
t
τ is noted in the corresponding device specification.
Figure 12–26. Receive-Start Timing Using URXS Flag, Glitch Suppression
URXD
URXS
Majority Vote
t τ
The interrupt handler must reset the URXSE bit in control register UCTL to
prevent further interrupt service requests from the URXS signal and to enable
the basic function of the receive interrupt flag URXIFG.