Texas Instruments MSP430x1xx - Manual (Page 224)

Asynchronous Operation
12-8
When two stop bits are used for the idle line, as shown in Figure 12–8, the
second one is counted as the first mark bit of the idle period. The first character
received after an idle period is an address character. The RXWake bit can be
used as an address tag for the character. In the idle-line multiprocessor format,
the RXWake bit is set when a received character is an address character and
is transferred into the receive buffer.
Figure 12–8. USART Receiver Idle Detect
10-Bit Idle Period
Mark
Space
XXXX SP ST XXXXXXX
Example: One Stop Bit
10-Bit Idle Period
Mark
Space
XXXX SP ST XXXXXXX
Example: Two Stop Bits
SP
SP: Stop Bit
ST: Start Bit
Normally, if the USART URXWIE bit is set in the receive control register,
characters are assembled as usual by the receiver. They are not, however,
transferred to the receiver buffer, URXBUF, nor are interrupts generated.
When an address character is received, the receiver is temporarily activated
to transfer the character to URXBUF and to set the URXIFG interrupt flag.
Applicable error status flags are set. The application software can validate the
received address. If there is a match, the application software further
processes the data and executes the operation. If there is no match, the
processor waits for the next address character to arrive. The URXWIE bit is
not modified by the USART: it must be modified manually to receive
nonaddress or address characters.
In idle-line multiprocessor format, a precise idle period can be generated to
create efficient address character identifiers. The wake-up temporary (WUT)
flag is an internal flag and is double-buffered with TXWake. When the
transmitter is loaded from UTXBUF, WUT is loaded from TXWake, and the
TXWake bit is reset as shown in Figure 12–9.
Figure 12–9. Double-Buffered WUT and TX Shift Register
TX Buffer UTXBUF
TX Shift Register WUT
TXWake
Start Bit Parity Bit
TX Signal