Texas Instruments MSP430x1xx User Manual

Page 424

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Flash Memory Data Structure and Operation

C-12

The write cycle is successfully completed if none of the following restrictions
is violated:

-

The selected clock source is available until the cycle is completed.

-

The predivider is not modified.

-

The access to the flash memory module is restricted as long as BUSY is
set.

The conditions to read data from the flash memory with and without access
violation are listed in Table C–2.

Table C–2. Conditions to Read Data From Flash Memory

Flash Operation

Instruction

Fetch

(see Note 1)

BUSY

WAIT

Data on Memory Data

Bus (MDB)

Action

Byte/word program
cycle (see Note 2)

No

1

0

3FFF

Access violation

Yes

1

0

3FFF

JMP $

Nothing

Flash read mode

0

0

Memory contents from
applied address

PC = PC + 2

Page erase cycle
(see Note 3)

No

1

0

3FFF

Access violation

Yes

1

0

3FFF

JMP $

Nothing

Mass-erase cycle
(see Note 3)

No

1

0

3FFF

Access violation

Yes

1

0

3FFF

JMP $

Nothing

All erase (mass and in-
formation memory)

No

1

0

3FFF

Access violation

Yes

1

0

3FFF

JMP $

Nothing

Segment write
(see Note 4)

N.A.

1

0

3FFF

Access violation and
LOCK (see Note 5)

No

1

1

3FFF

Nothing

Yes

1

1

3FFF

Access violation and
LOCK (see Note 5)

Notes:

1) Instruction fetch refers to the fetch part of an instruction, and reads one word. The instruction fetch reads the first

word of instructions with more than one word. The JMP instruction has one word. The data fetched (3FFFh) is used
by the CPU as an instruction.

2) Ensure that the programmed data does not result in unpredictable program execution, such as destruction of

executable code sequences.

3) If the PC points to the memory location being erased, no access violation indicates this situation. After erase, no

executable code is available and an unpredictable situation occurs.

4) Any software located in a flash memory module can not use the SEGWRT mode to program the same flash memory

module. Using the byte or word programming mode allows programming data in the flash memory module holding
the software code currently executing.

5) The access violation sets the LOCK bit to 1. Setting the LOCK bit allows completion of the active segment write

operation in the normal manner.

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