Texas Instruments MSP430x1xx - Manual (Page 47)

Operating Modes
3-17
System Resets, Interrupts, and Operating Modes
- Return from interrupt
Two different modes are available to return from the interrupt service routine
and continue the flow of operation:
J Return with low-power mode bits set. When returning from the
interrupt, the program counter points to the next instruction. The
instruction pointed to is not executed, since the restored low power
mode stops CPU activity.
J Return with low-power mode bits reset. When returning from the
interrupt, the program continues at the address following the
instruction that set the OscOff or CPUOff-bit in the status register. To
use this mode, the interrupt service routine must reset the OscOff,
CPUOff, SCGO, and SCG1 bits on the stack. Then, when the SR
contents are popped from the stack upon RETI, the operating mode
will be active mode (AM).
There are six operating modes that the software can configure:
- Active mode AM; SCG1=0, SCG0=0, OscOff=0, CPUOff=0:
CPU clocks are active
- Low power mode 0 (LPM0); SCG1=0, SCG0=0, OscOff=0, CPUOff=1:
CPU is disabled
MCLK is disabled
SMCLK and ACLK remain active
- Low power mode 1 (LPM1); SCG1=0, SCG0=1, OscOff=0, CPUOff=1:
CPU is disabled
MCLK is disabled
DCO’s dc generator is disabled if the DCO is not used for MCLK or
SMCLK when in active mode. Otherwise, it remains enabled.
SMCLK and ACLK remain active