Texas Instruments MSP430x1xx User Manual

Page 29

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Program Memory

2-3

Architectural Overview

2.3

Program Memory

Instruction fetches from program memory are always 16-bit accesses,
whereas data memory can be accessed using word (16-bit) or byte (8-bit)
instructions. Any access uses the 16-bit memory data bus (MDB) and as many
of the least-significant address lines of the memory address bus (MAB) as
required to access the memory locations. Blocks of memory are automatically
selected through module-enable signals. This technique reduces overall
current consumption. Program memory is integrated as programmable or
mask-programmed memory.

In addition to program code, data may also be placed in the ROM section of
the memory map and may be accessed using word or byte instructions; this
is useful for data tables, for example. This unique feature gives the MSP430
an advantage over other microcontrollers, because the data tables do not
have to be copied to RAM for usage.

Sixteen words of memory are reserved for reset and interrupt vectors at the
top of the 64-kilobytes address space from 0FFFFh down to 0FFE0h.

2.4

Data Memory

The data memory is connected to the CPU through the same two buses as the
program memory (ROM): the memory address bus (MAB) and the memory
data bus (MDB). The data memory can be accessed with full (word) data width
or with reduced (byte) data width.

Additionally, because the RAM and ROM are connected to the CPU via the
same busses, program code can be loaded into and executed from RAM. This
is another unique feature of the MSP430 devices, and provides valuable,
easy-to-use debugging capability.

2.5

Operation Control

The operation of the different MSP430 members is controlled mainly by the
information stored in the special–function registers (SFRs). The different bits
in the SFRs enable interrupts, provide information about the status of interrupt
flags, and define the operating modes of the peripherals. By disabling
peripherals that are not needed during an operation, total current consumption
can be reduced. The individual peripherals are described later in this manual.

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