Texas Instruments MSP430x1xx - Manual (Page 250)

Synchronous Operation
13-4
13.3 Synchronous Operation
In USART synchronous mode, data and clock signals transmit and receive
serial data. The master supplies the clock and data. The slaves use this clock
to shift serial information in and out.
The four-pin SPI mode also uses a control line to enable a slave to receive and
transmit data. The line is controlled by the master.
Three or four signals are used for data exchange:
- SIMO Slave in, master out
The direction is defined by SIMODIR (SIMODIR=0, input
direction) SIMODIR = [SYNC .and. MM .and. (STC .or. STE)]
Output direction is selected when SPI + Master Mode is selected.
When 4-pin SPI is selected (STC=0) input direction is forced by
a low level on external STE pin.
- SOMI Slave out, master in
The direction is defined by SOMIDIR (SIMODIR=0 input
direction) SOMIDIR = [SYNC .and. .not.(MM)] .or.
[STC .or. .not.(STE)]
Output direction is selected when SPI + Slave Mode is selected.
When 4-pin SPI is selected (STC=0) input direction is forced by
a low level on external STE pin.
- UCLK USART clock. The master drives this signal and the slave uses
it to receive and transmit data.
The direction is defined by UCLKDIR (UCLKDIR=0 input
direction) UCLKDIR = [SYNC .and. MM .and. (STC .or. STE)]
Output direction is selected when SPI + Master Mode is selected.
When 4-pin SPI is selected (STC=0) input direction is forced by
a low level on external STE pin.
- STE Slave transmit enable. Used in four-pin mode to control more
than one slave in a multiple master and slave system.
The interconnection of the USART in synchronous mode to another device’s
serial port with one common transmit/receive shift register is shown in
Figure 13–3, where MSP430 is master or slave. The operation of both devices
is identical.