Texas Instruments MSP430x1xx User Manual

Page 419

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Flash Memory Data Structure and Operation

C-7

Flash Memory

or erase operation. Once these registers are set up and write or erase is
started, the timing generator controls the entire operation and applies all
signals internally. If the BUSY control signal is set, it indicates that the timing
generator is active and a write or erase cycle is active. The segment write
mode also uses a second control bit WAIT. There are three basic parts to a
write or erase cycle: preparation of program/erase voltage, control timing for
the program or erase operation, and the switch-off sequence of the
program/erase voltage. Once a write or erase function is started, the software
should not access the flash memory until the BUSY signal indicates, with

0,

that it can be accessed again. In critical situations where flash programming
or erase should be immediately stopped, the

emergency exit bit EMEX can be

set. The current operation may be incomplete or the result may be incorrect.

Two different clock sources (ACLK, MCLK, or SMCLK) can be selected to
clock the timing generator. The connected clock sources applied to the timing
generator may vary with the device, see data sheet for details. The clock
source selected should be active from the beginning of write or erase until the
operation is fully completed.

Figure C–6.Block Diagram of the Timing Generator in the Flash Memory Module

0

2

3

SSEL1
SSEL0

1

FN5

FN0

fx

PUC

...........

Write ‘1’ to

EMEX

Flash Timing Generator

Divider, 1–64

Busy

Wait

ACLK

MCLK

SMCLK

SMCLK

Reset

The selected clock source should be divided to meet the frequency require-
ment f

x

of the flash timing generator.

If the clock signals are not available throughout the duration of the write or
erase operation, or their frequencies change drastically, the result of the write
or erase may be marginal, or the flash memory module may be stressed above
the limits of reliable operation.

Table C–1 shows all useful combinations of control bits for proper write and
erase operation:

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