Texas Instruments MSP430x1xx - Manual (Page 231)

Control and Status Registers
12-15
USART Peripheral Interface, UART Mode
12.5 Control and Status Registers
The USART control and status registers are byte-structured and should be
accessed using byte processing instructions (suffix B). Tables 12–2 and 12–3
list the registers and their access modes.
Table 12–2.USART0 Control and Status Registers
Register
Short
Form Register
Type
Address Initial State
USART control UCTL0 Read/write 070h See section 12.5.1.
Transmit control UTCTL0 Read/write 071h See section 12.5.2.
Receive control URCTL0 Read/write 072h See section 12.5.3.
Modulation control UMCTL0 Read/write 073h Unchanged
Baud rate 0 UBR00 Read/write 074h Unchanged
Baud rate 1 UBR10 Read/write 075h Unchanged
Receive buffer URXBUF0 Read/write 076h Unchanged
Transmit buffer UTXBUF0 Read 077h Unchanged
Table 12–3.USART1 Control and Status Registers
Register
Short
Form Register
Type
Address Initial State
USART control UCTL1 Read/write 078h See section 12.5.1.
Transmit control UTCTL1 Read/write 079h See section 12.5.2.
Receive control URCTL1 Read/write 07Ah See section 12.5.3.
Modulation control UMCTL1 Read/write 07Bh Unchanged
Baud rate 0 UBR01 Read/write 07Ch Unchanged
Baud rate 1 UBR11 Read/write 07Dh Unchanged
Receive buffer URXBUF1 Read/write 07Eh Unchanged
Transmit buffer UTXBUF1 Read 07Fh Unchanged
All bits are random after a PUC signal, unless otherwise noted by the detailed
functional description.
The reset of the USART peripheral interface is performed by a PUC signal or
a SWRST. After a PUC signal, the SWRST bit remains set and the USART
interface remains in the reset condition until it is disabled by resetting the
SWRST bit.
The USART module operates in asynchronous or synchronous mode as
defined by the SYNC bit. The bits in the control registers can have different
functions in the two modes. All bits in this section are described with their
functions in the asynchronous mode (SYNC = 0). Their functions in the
synchronous mode are described in Chapter 13,
USART Peripheral Interface,
SPI Mode.