Texas Instruments MSP430x1xx - Manual (Page 302)

Conversion Modes
15-12
Figure 15–6. Example Conversion-Memory Setup
Select
0140h
0142h
015Ch
015Eh
12–bit S A R
ADC12MEM0
ADC12MEM14
ADC12MEM15
16 x 12–bit
ADC Memory
140h + 2 x CStartAdd 80h + CStartAdd
ADC12MEM2
0
0
conversion result
080h
081h
08Eh
08Fh
ADC12MCTL0
ADC12MCTL14
ADC12MCTL15
16 x 8–bit
ADC Memory Controls
ADC12MCTL2
0 0 1 0 0 0 0 1
Multiplexer
E
O
S
VR+/VR–
15.5.2 Sequence-of-Channels Mode
The sequence-of-channels mode converts a sequence of channels. The
CStartAdd bits in ADC12CTL1 point to the first conversion-memory register
used for the sequence. The results of the remaining conversions in the se-
quence are stored in sequential conversion-memory registers. For example,
if a sequence is three-conversions long and the CStartAdd bits point to conver-
sion-memory register 4, then when the sequence is started, the first conver-
sion result isstored in ADC12MEM4, the second result is stored in
ADC12MEM5, and the third result is stored in ADC12MEM6.
When performing sequences of conversions, the channels and references for
each conversion are individually configurable via the conversion-memory con-
trol register associated with the each conversion-memory register used in the
sequence. For example, if a sequence of conversions uses ADC12MEM3 –
ADC12MEM6, then the channel and reference(s) for each conversion are indi-
vidually configurable with ADC12MCTL3 – ADC12MCTL6.
The end of a sequence is marked by the end-of-sequence bit (EOS) in the last
conversion-memory control register used in the sequence. Each conversion-
memory control register contains an EOS bit. All EOS bits of the conversion-
memory control registers used in a sequence must be reset, except for the last
one in the sequence. For example, if a sequence starts with ADC12MEM7 and
ends with ADC12MEM12, then the EOS bit of registers ADC12MCTL7 –
ADC12MCTL11 must be reset and the EOS bit of ADC12MCTL12 must be set.
Conversions stop when the end of a sequence is reached.
To execute the same sequence, or a new sequence, the ENC bit must be reset
and then set again. All additional sample-input signals are ignored until this
happens. Note that the ENC bit may be reset any time after the sequence
begins, and the sequence still completes normally (see Figure 15–7).
If the conversion mode is changed after the sequence begins but before it has
completed and the ENC bit is left high, the sequence completes normally, and
the new mode takes effect after the sequence completes, unless the new
mode is
single-channel single-conversion. If the new mode is single-channel
single-conversion, the current sequence-of-channels stops proceeding when