Texas Instruments MSP430x1xx - Manual (Page 226)

Asynchronous Operation
12-10
Figure 12–11.Address - Bit Multiprocessor Format
ST Address SP ST Data SP ST Data SP
Block of Frames
Idle Periods of No Significance
TXD/RXD Expanded
UTXD/URXD
First Frame Within Block
Is an Address. The
ADDR/DATA Bit is 1 ADDR/DATA Bit is 0
for Data Within Block.
Idle Time Is of No Significance
UTXD/URXD
1 0 0
In the address-bit multiprocessor mode, the address bit of a character can be
controlled by writing to the TXWake bit. The value of the TXWake bit is loaded
into the address bit of that character each time a character is transferred from
transmit buffer UTXBUF to the transmitter. The TXWake bit is then cleared by
the USART.