Texas Instruments MSP430x1xx - Manual (Page 65)

5-1
16-Bit CPU
16-Bit CPU
The MSP430 von-Neumann architecture has RAM, ROM, and peripherals in
one address space, both using a single address and data bus. This allows
using the same instruction to access either RAM, ROM, or peripherals and
also allows code execution from RAM.
Topic Page
5.1 CPU Registers 5-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Addressing Modes 5-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Instruction Set Overview 5-17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Instruction Map 5-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 5