Texas Instruments MSP430x1xx - Manual (Page 79)

Addressing Modes
5-15
16-Bit CPU
5.2.8 Clock Cycles, Length of Instruction
The operating speed of the CPU depends on the instruction format and
addressing modes. The number of clock cycles refers to the MCLK.
5.2.8.1 Format-I Instructions
Table 5–12 describes the CPU format-I instructions and addressing modes.
Table 5–12.Instruction Format I and Addressing Modes
Address Mode No. of Length of Example
As Ad
Cycles Instruction
00, Rn 0, Rm
0, PC 1
2 1
1 MOV
BR R5,R8
R9
00, Rn 1, x(Rm)
1, EDE
1, &EDE 4 2
2
2 ADD
XOR
MOR R5,3(R6)
R8,EDE
R5,&EDE
01, x(Rn)
01, EDE
01, &EDE 0, Rm 3 2
2
2 MOV
AND
MOV 2(R5),R7
EDE,R6
&EDE,R8
01, x(Rn)
01, EDE
01, &EDE 1, x(Rm)
1, TONI
1, &TONI 6 3
3
3
3 ADD
CMP
MOV
ADD 3(R4),6(R9)
EDE,TONI
2(R5),&TONI
EDE,&TONI
10, @Rn 0, Rm 2 1 AND @R4,R5
10, @Rn 1, x(Rm)
1, EDE
1, &EDE 5 2
2
2 XOR
MOV
XOR @R5,8(R6)
@R5,EDE
@R5,&EDE
11, @Rn+
11, #N
0, Rm
0, PC
0, Rm
0, PC 2
3
2
3 1
1
2
2 ADD
BR
MOV
BR @R5+,R6
@R9+
#20,R9
#2AEh
11, @Rn+
11, #N
11, @Rn+
11, #N 1, x(Rm)
1, EDE
1, &EDE 5 2
3
2
3 MOV
ADD
MOV
ADD @R9+,2(R4)
#33,EDE
@R9+,&EDE
#33,&EDE