Texas Instruments MSP430x1xx - Manual (Page 300)

Conversion Modes
15-10
V
R–
) is configured in the same conversion-memory control register by the Sref
bits. The conversion result is stored in conversion-memory register
ADC12MEMx pointed to by the CStartAdd bits.
The conversion may be stopped immediately by resetting the enable-
conversion bit (ENC, located in ADC12CTL0), but the conversion results will
be unreliable, or the conversion may not be performed. This is illustrated in
Figure 15–4.
Figure 15–4. Stopping Conversion With ENC Bit
ENC
Sample Period Conversion Period
SAMPCON
Operational Mode
ENC is reset before conversion period is completed:
no conversion executed or unreliable conversion result.
Sample Period Conversion Period
ENC is reset after conversion period is completed:
conversion is executed regularly.
Sample-and-conversion (SAMPCOM) signal can be reset
and conversion started when appropriate. and conversion started when appropriate.
ENC and ADC12SC
may be set together
ENC and ADC12SC
may be set together
Sample-and-conversion (SAMPCOM) signal can be reset
ENC
SAMPCON
Operational Mode
ENC is reset before conversion period is completed:
no conversion executed or unreliable conversion result.
ENC is reset after conversion period is completed:
conversion is executed regularly.
Sample-and-conversion (SAMPCOM) signal can be reset
and conversion started when appropriate. and conversion started when appropriate.
Sample-and-conversion (SAMPCOM) signal can be reset
Sample Period Conversion Period Sample Period Conversion Period
When the conversion is complete and the results are written to the selected
conversion-memory register, the corresponding interrupt flag ADC12IFG.x is
set, and, if the appropriate interrupt enables are set, an interrupt request is
generated (see the
ADC12 Interrupt Vector Register ADC12IV section).
Once the conversion is completed, the ENC bit must be reset and then set
again to prepare for another conversion. All additional incoming sample-input
signals will be ignored until the ENC bit is reset and set again. Also, the conver-
sion mode may be changed after the conversion begins but before it has com-
pleted, and the new mode will take effect after the current conversion has com-
pleted. See also the
Switching between Conversion Modes section.
An illustration of single-channel, single-conversion mode is shown in Figure
15–5.