Texas Instruments MSP430x1xx - Manual (Page 158)

Timer Modes
10-18
10.4.2 Capture/Compare Block—Compare Mode
The compare mode is selected if the CAPx bit, located in control word CCTLx,
is reset. In compare mode all the capture hardware circuitry is inactive and the
capture-mode overflow logic is inactive.
The compare mode is most often used to generate interrupts at specific time
intervals or used in conjunction with the output unit to generate output signals
such as PWM signals. If the timer becomes equal to the value in compare
register x, then:
- Interrupt flag CCIFGx, located in control word CCTLx, is set.
- An interrupt is requested if interrupt enable bits CCIEx and GIE are set.
- Signal EQUx is output to the output unit. This signal affects the output
OUTx, depending on the selected output mode.
The EQU0 signal is true when the timer value is greater or equal to the CCR0
value. The EQU1 to EQU4 signals are true when the timer value is equal to
the corresponding CCR1 to CCR4 values.